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High Level Synthesis of Asics Under Timing and Synchronization Constraints by David C. Ku, Giovanni De Micheli (1992, Hardcover) 
High Level Synthesis of Asics Under Timing and Synchronization Constraints by David C. Ku, Giovanni De Micheli (1992, Hardcover)

 
High Level Synthesis of Asics Under Timing and Synchronization Constraints by David C. Ku, Giovanni De Micheli (1992, Hardcover)

Publisher: Kluwer Academic Pub
Publication Date: 1992-06-01
Series: The Kluwer International Series in Engineering and Computer Science
Language: English
Format: Hardcover
ISBN-10: 0792392442
ISBN-13: 9780792392446
Product ID: EPID1373407
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Details
Publication Date:1992-06-01
Series:The Kluwer International Series in Engineering and Computer Science

Size
Length:294 pages
Height:9.8 in
Width:6.5 in
Thickness:1.0 in
Weight:25.6 oz

Industry Reviews
Addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. The objective of the research work presented here is to develop a hardware model incorporating concurrency, external synchronization, and detailed timing constraints as well as synthesis algorithms that operate on this hardware model. Annotation copyright Book News, Inc. Portland, Or.
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